Design & Reuse
Catalog of SIP Cores
System on Chip design resources
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996 IP
951
0.0
LogicFlash® Embedded MTP in Tower 180nm
LogicFlash® MTP是一种基于CMOS工艺的嵌入式非挥发性存储器技术，基于逻辑工艺实现，无需增加额外光罩层次，或通过增加1层额外光罩，缩减IP面积，适合于1KB~64KB的中等容量应用，同时提供高达2万次的擦写次数。 LogicFlash®技术可以在0.18um到55nm的Logic/BC...
952
0.0
LogicFlash® Embedded MTP in TSMC 180nm~130nm
LogicFlash® MTP是一种基于CMOS工艺的嵌入式非挥发性存储器技术，基于逻辑工艺实现，无需增加额外光罩层次，或通过增加1层额外光罩，缩减IP面积，适合于1KB~64KB的中等容量应用，同时提供高达2万次的擦写次数。 LogicFlash®技术可以在0.18um到55nm的Logic/BC...
953
0.0
LogicFlash® Embedded MTP in UMC 180nm~110nm
LogicFlash® MTP是一种基于CMOS工艺的嵌入式非挥发性存储器技术，基于逻辑工艺实现，无需增加额外光罩层次，或通过增加1层额外光罩，缩减IP面积，适合于1KB~64KB的中等容量应用，同时提供高达2万次的擦写次数。 LogicFlash®技术可以在0.18um到55nm的Logic/BC...
954
0.0
Foundry sponsored - Single Port SRAM compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 320 k
Foundry sponsored - Single port SRAM compiler - TSMC 55 nm uLP - Memory optimized for high density and low power - Dual Voltage - compiler range up to...
955
0.0
sROMet compiler - Memory optimized for high density and high speed - compiler range up to 2M
Foundry sponsored - sROMet compiler - TSMC 55 nm HV - Non volatile memory optimized for high density and high speed - compiler range up to 2M...
956
0.0
sROMet compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 1M
Foundry sponsored - sROMet compiler - TSMC 55 nm uLPeFlash - Non volatile memory optimized for high density and low power - Dual Voltage - compiler ra...
957
0.0
Pseudo 2 Port High-Current Compiler with Column Redundancy, Low Leakage with retention, Power Gating w/wo retention, Dual Rail, Mixed VT option
Pseudo 2 Port High-Current Compiler with Column Redundancy, Low Leakage with retention, Power Gating w/wo retention, Dual Rail, Mixed VT option...
958
0.0
TSMC CLN16FFC TCAM Compiler with ULVT periphery
IGMTLSV03A is a synchronous ULVT periphery high-density ternary content addressable memory (TCAM). It is developed with TSMC 16nm 0.8V/1.8V CMOS LOGIC...
959
0.0
TSMC CLN16FFC Ultra High Density One Port Register File
IGMSLRV01A is a synchronous SVT / LVT periphery ultra high density one port register file compiler. It is developed with TSMC 16 nm 0.8 V/1.8 V CMOS L...
960
0.0
TSMC CLN5FF High Density Single Port SRAM Compiler
IGMSHDY01A is a synchronous ULVT / LVT periphery high density single port SRAM compiler. It is developed with TSMC 5 nm 0.75 V/1.2 V CMOS LOGIC FinFET...
961
0.0
TSMC CLN6FF Pre-search and Pipeline Ternary Content Addressable Memory Compiler
IGMTLSX08A is a synchronous LVT / ULVT periphery high-density pre-search and pipeline ternary content addressable memory (TCAM) with column redundancy...
962
0.0
TSMC CLN6FF Ternary Content Addressable Memory Compiler with Column Redundancy
IGMTLSX07A is a synchronous LVT / ULVT periphery high-density ternary content addressable memory (TCAM) with column redundancy feature. It is develope...
963
0.0
TSMC CLN7FF Synchronous One Port Register File Compiler
The IGMSLRX01A is a synchronous, ultra-high density one port register file compiler. It is developed with TSMC 7 nm 0.75 V/1.8 V CMOS LOGIC FinFET Pro...
964
0.0
TSMC CLN7FF Ternary Content Addressable Memory Compiler with Column Redundancy
IGMTLSX06A is a synchronous LVT / ULVT periphery high-density ternary content addressable memory (TCAM) with column redundancy feature. It is develope...
965
0.0
TSMC embedded flash controller
The eSi-TSMC-Flash IP core provides an AMBA 3 AHB-lite interface to TSMC's embedded flash macros....
966
0.0
OTP IP
Zhuhai Chuangfeixin (CFX) offers two proprietary OTP technologies and respective silicon IPs：One is Anti-fuse, the other is floating gate. CFX OTP ...
967
0.0
OTP One Time Programmable IP HHGrace 55HV
Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...
968
0.0
OTP One Time Programmable IP HHGrace 55LP
Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...
969
0.0
OTP One Time Programmable IP HHGrace 90BCD
Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...
970
0.0
OTP One Time Programmable IP HLMC 55CIS
Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...
971
0.0
OTP One Time Programmable IP Nexchip 110HV
Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...
972
0.0
OTP One Time Programmable IP Nexchip 110LP2
Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...
973
0.0
OTP One Time Programmable IP Nexchip 55HV_6V
Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...
974
0.0
OTP One Time Programmable IP Samsung 90CIS
Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...
975
0.0
OTP One Time Programmable IP SIL130HV
Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...
976
0.0
OTP One Time Programmable IP SIL180
Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...
977
0.0
OTP One Time Programmable IP Silterra 160HV
Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...
978
0.0
OTP One Time Programmable IP SMIC 153nm
Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...
979
0.0
OTP One Time Programmable IP SMIC 28HV
Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...
980
0.0
OTP One Time Programmable IP SMIC 55HV
Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...
981
0.0
OTP One Time Programmable IP SMIC130
Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...
982
0.0
OTP One Time Programmable IP XMC 55LL
Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...
983
0.0
Dual Port High-Current SRAM Compiler with Column Redundancy, Low Leakage with retention, Power Gating w/wo retention, Dual Rail, Mixed VT option
Dual Port High-Current SRAM Compiler with Column Redundancy, Low Leakage with retention, Power Gating w/wo retention, Dual Rail, Mixed VT option...
984
0.0
Dual Port Register File Compiler (1 Read-Only Port, 1 Write-Only Port)
Mobile Semiconductor's RF1P-ULL-GF22FDX-PLUS memory compiler generates Dual Port Register File instances using the GLOBALFOUNDRIES 22nm FDX-PLUS CMOS...
985
0.0
Dual Port Register File Compiler (1 Read-Only Port, 1 Write-Only Port)
Low Leakage. Mobile Semiconductor's RF1P-ULL-GF22FDX-PLUS memory compiler generates Dual Port Register File instances using the GLOBALFOUNDRIES 22nm F...
986
0.0
Dual Port Register File Compiler (1 Read-Only Port, 1 Write-Only Port)
Dual Port, Voltage Scaling Option supports VDD of 0.5V to 0.8 V nominal while the array operates at 0.8V. Mobile Semiconductor's RF2P-UXL-GF22FDX-PLU...
987
0.0
Dual Port SRAM compiler - Memory optimized for high density and low power - compiler range up to 80 k
Foundry sponsored - Dual Port SRAM compiler - TSMC 90 nm LPeF - Memory otimized for high density and low power - compiler range up to 80 k...
988
0.0
Bulk 40ULP single port SRAM Compiler - ultra low power, low power retention mode
Silicon proven, qualified and in high volume production. Single Port compiler offers the lowest retention power on the market....
989
0.0
Bulk 40ULP Single Port SRAM with low power retention mode, high speed pins on 1 side
Low Leakage. Mobile Semiconductor's Bulk 40 ULP BULKSRAM memory compiler generates memory instances using the premier low power 40nm process.. Each ul...
990
0.0
NVM EEPROM NeoEE in DBHitek(180nm, 90nm)
eMemory's NeoEE IP is a cost-effective embedded EEPROM solution for both foundries & customers. No additional masks are required, and NeoEE gives foun...
991
0.0
NVM MTP in DB HiTek (130nm)
Synopsys Non-Volatile Memory (NVM) IP provides reprogrammable NVM supporting up to 1 million bits (1Mbit) configurations in standard CMOS and BCD proc...
992
0.0
Two port register file (1R1W) with low power retention mode
Low Leakage. Mobile Semiconductor's Bulk 22 ULL Register file memory compiler generates dual port Register File instances using the Bulk 22ULL proces...
993
0.0
Two Port Register File compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 64 k
Foundry sponsored - Two Port Register File compiler - TSMC 55 nm uLP - Memory optimized for high density and low power - Dual Voltage - compiler range...
994
0.0
Two Port Register File Compiler IP, UMC 40nm LP process
UMC 40nm LP/ Low-K process, Two Port Register File memory compiler....
995
0.0
1x32 Bits OTP (One-Time Programmable) IP, TSM- 0.18μm SiGe BiCMOS 1.8V/3.3V Process
The ATO0001X32TS180SGE3NA is organized as 1 by 32 bits one-time programmable (OTP). This is a kind of non-volatile memory fabricated in 0.18um SiGe Bi...
996
0.0
1x64 Bits OTP (One-Time Programmable) IP, TSM- 0.18μm Mixed-Signal 1.8V/3.3V Process
The AT1X64T180MM0AB is organized as one by 64 bits one-time programmable (OTP). This is a kind of non-volatile memory fabricated in TSM- Mixed-Signal ...